Chapter 3 Bipolar Junction Transistors (BJT)

Transkript

1 hapter 3 ipolar Junction Transistors (JT) 1 Transistors 1. ipolar Junction Transistor (JT) 2. Field ffect Transistor (FT) ipolar Junction Transistor (JT) Field ffect Transistor (FT) 2

2 Transistors 1. - KWatt - Mega Watt Milli Amp, - Micro Amp 2. Digital - Microprocessor -Memory - LD Display FT MOS 3 Transistor ias Transistor Transistor Digital Transistor Transistor ell Labs

3 5 ipolar Junction Transistor (JT) PN Junction ipolar 2 + Transistor Transfer + esistor * nput Output * JT 2 NPN Transistor PNP Transistor 6

4 Transistors NPN Transistors PNP Transistors mitter ollector mitter ollector ase ase N P 7 N P ase, mitter ollector Dope JT ase 1:150, ase Dope mitter Dope 10 8

5 JT ase mitter ollector JT ertical ase N P N 9 Transistor D AS ias ase - mitter ias ase - ollector ias 3 mode» Active Mode» ut Off» Saturation 10

6 Active Mode = Active i o t t Active Transistor ircuit ut Off Mode = Transistor OFF ut OFF i o o = 0 t t utoff Transistor ircuit 11 Saturation Mode = Saturation o i o t t Transistor in Saturation Active utoff Saturation 12

7 Transistor ias mode ias Transistor 2 Junction 2 Junction» ase-mitter Junction ( Junction) ase- ollector Junction ( Junction) Junction Junction Supply Supply 13 ias Transistor Active Transistor Active Mode Junction Forward Junction everse Junction Forward Transistor P N P Junction everse, ommon ase 14

8 Depletion egion Forward ias Junction Depletion egion everse ias Junction Depletion egion P N P ase ollector mitter open Open ase mitter = O everse ias = S = O O O O ollector ase Open A na 16

9 2. open = FWD Forward ias Open ase ollector = forward ma , 2?? Minority O (everse) Forward

10 2 > 1 1. ase ( ase ) 2. ase Dope ase ( ) 3. Depletion ase * * ase NPN Transistor 19 PNP Transistor O Majority O TOTAL O O 20

11 NPNTransistor ase mitter, Forward O ase ollector, everse Majority O TOTAL O O 21 Transistor NPN Transistors PNP Transistors mitter mitter 22

12 Transistor ommon Transistor ( common ) nput, Output ommon ommon 3 1. ommon ase ; 2. ommon mitter ; 3. ommon ollector ; 23 ommon ase ase nput Output D OUT N N nput D = ommon ase urrent Gain = ommon ase Output OUT ommon ase L 24

13 ommon-base pnp npn 25 D Transistor Active D = 1 D = JT dc O O Open common base O O O D D A ac D constant 26

14 - curve common base nput = curve common base Output forward, reverse bias forward bias reverse bias 28

15 ommon mitter OUT mitter nput ase Output ollector N nput Output cc D OUT N D = ommon mitter urrent Gain = ommon mitter ommon mitter 29 ommon mitter npn pnp 30

16 - curve common emitter npn = curve common emitter forward, reverse bias 32

17 D Transistor Active 100 D D ( 1) >> D D = JT O Open common emitter O O 1 O O A constant 33 ac A ommon mitter A constant 34

18 ommon ollector OUT ollector nput ase Output mitter N nput Output cc ommon ollector OUT D 1 D 1 ommon ollector ( D +1) N 35 ommon ollector npn pnp 36

19 Transistor JT urrent Gain Parameters 2 D D Transistor D D D D D D 1 D D 1 D D Transistor Ground,, Junction = to = - = to = = to = Transistor = + 38

20 Operating egion Operating egion reakdown max = Fixed ias = 2. Self ias = 3. oltage Divider ias = 4. ollector Feedback ias = 40

21 JT bias common-emitter npn transistor npn transistor nput Output 41 JT bias transistor 3modes Active ut-off Saturation 42

22 JT bias curve 43 Active mode ondition : 0 A sat ( ) 0.7 on 44

23 Active mode dc ( 1) 45 ut-off mode ut-off condition: ase-mitter reverse bias = 0 A 46

24 Saturation mode Saturation condition: ase-mitter forward bias = (on) = 0.7 = sat = sat 47 Fixed-bias (Fixed Q ) Q Q Q + Q cc 0.7 olts Q 48

25 Fixed-bias ase ollector Q Q Q - Active 0.7 olts 49 Fixed-bias : Active mode 50

26 Fixed-bias : Active mode Set = (on) = 0.7 = 0.7 > (on) 51 Fixed-bias : Active mode Q sat 52

27 Fixed-bias : Active mode : xample Q, Q, Q k 2.5 k 107 sat 1 53 Fixed-bias : Load line analysis (Q-point) - curve load line 54

28 Fixed-bias : Load line analysis load line : output Load line 55 Fixed-bias : Load line analysis load line output KL : 1 56

29 Fixed-bias : Load line analysis 1 y ( = 0 ) 0 x ( = 0 A ) 0 57 Fixed-bias : Load line analysis 58

30 Fixed-bias : Load line : xample x 15 y ma 59 Fixed-bias : Load line : xample Q = 3.21 ma Q point = 7 Q > sat 60

31 Fixed-bias : Active mode : Q-point 61 Fixed-bias : Active mode : Q-point 62

32 Fixed-bias : Active mode : Q-point 63 Fixed-bias : Load line : xample (1) (2)? Q = 4.1 ma (1) (2) Q =

33 Fixed-bias : Load line : xample = 4.1 ma 8.4 Option 1 =2.5k 1.78k 477k 357k = Fixed-bias : Load line : xample Option 2 = 4.1 ma = k 432.5k 18 =

34 Fixed-bias : Saturation sat Q sat Q sat sat sat sat Saturation Saturated Q sat 67 Fixed-bias : xample Saturation? 2.5 k sat 1 68

35 Fixed-bias : Load line : xample = 5.6 ma Q point 69 Self-bias 70

36 Self-bias Self-bias mitter stabilized bias i ( 1) ( on) ( 1) 71 Self-bias ( ) 72

37 Self-bias : xample x: Q-Point 73 x: Q-Point lock Q Q Solve: Q ( 1) Q 430K (50 1) 1 K Q A Q Q 2.01mA Q Q ( ) mA(2K 1K ) Active 74

38 Self-bias : xample x:,,, 75 x:,,, 2.01m 40.1 Solve: mA 2K + _ _ + _ everse ias

39 Self-bias : xample 77 Self-bias : Load line X 0 ma Y 0 78

40 Self-bias : Saturation mode sat ( ) Q Q sat Q Q sat sat ( ) on Q sat sat 79 oltage-divider bias Self ias 80

41 oltage-divider bias: Thevenin nput 2 TH 1 2 TH 1 // 2 Q TH TH ( 1) + Q - Q Q Q ( ) 81 oltage-divider bias : xample x: Q-Point 82

42 oltage-divider bias x: Q-Point Solve: Thevenin nput Q Short Q + Q - Short Thevenin TH K 2. 2K 1.73K 83 Thevenin ( 2 ) ma K TH ma 2.2 K

43 Q Q Q Q + Q Q 1.73K ( 1)1. 8 K A 20 Q Q A 4.25 ma Q Q( ) ma 2.7 K Q 8.53 Q Q Q 85 oltage-divider : xample 86

44 oltage-divider : Load line Self bias X Y 0 ma 0 87 oltage-divider : Saturation sat ( ) Q Q Q sat sat Q sat sat 88

45 ollector Feedback ias ollector KL: nput ' ' Q ' ( ) KL: Output Q ( ), 89 ollector Feedback ias x: Q-Point Q Q Q Q - Solve 90 Q 250K ( ) A Q Q (4.7K 1.07 ma 1.2K) Q ( ) mA (4.7K 1.2K)

46 4.1 Find,,,,. (h4 Pb7) Design a voltage-divider network given a transistor curve shown. (a) Determine and for the voltagedivider network having a Q-point of Q =5mA and Q =8. Use =24 and =3. (b) Find. (c) Determine. (d) Find 2 if 1 =24k assuming that (e) alculate at the Q-point. (h4 Pb19) 92

47 Design the transistor inverter of the figure below to operate with a saturation current of 8mA using a transistor with =100. Use a level of equal to 120% of sat and standard resistor values. (h4 Pb37) 94