LINK-56K. Emulator for Motorola s DSPs. A Product of Domain Technologies, Inc.

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1 LINK-56K Emulator for Motorola s DSPs A Product of Domain Technologies, Inc.

2 LINK-56K User s Guide, Version1.05 September, 2003 DSPs supported by this product: Motorola DSP56001 Motorola DSP56002 and derivatives Motorola DSP56156 and derivatives Motorola DSP56301 and derivatives Motorola MC68356 and derivatives Motorola DSP56800 and derivatives Motorola DSP56600 and derivatives Domain Technologies, Inc. 811 East Plano Pkwy, Ste 115 Plano, Texas Tel.: (972) Fax: (972) support@domaintec.com Web page: Disclaimer of Warranty This software package is provided on an AS IS basis and without warranty. In no event shall Domain Technologies be liable for incidental or consequential damages arising from the use of this software. This disclaimer of warranty extends to LICENSEE, to LICENSEE s customers or users of products and is in lieu of all warranties whether expressed, implied, or statutory, including implied warranties of merchantability or fitness for a particular purpose. Domain Technologies does not warrant that software furnished hereunder is free of infringement of any third party patents, copyrights, or trade secrets. LINK-56K User Manual 2

3 TABLE OF CONTENTS CHAPTER 1 - GENERAL INFORMATION System Introduction Introduction to this Manual System Features Package Contents Hardware Requirements JTAG/OnCE Powering Options The OnCE/JTAG Connector PROBE Jumper Settings CHAPTER 2 - REFERENCES Figure 1-10 pin OnCE header Figure 2-14 pin OnCE header Figure 3-14pinJTAG header Figure 4 - LINK-56K circuit diagram CONTENTS

4 CONTENTS

5 General Information CHAPTER 1 - GENERAL INFORMATION System Introduction LINK-56K is a software development system for the MotorolaTM 16 and 24 bit Digital Signal Processors Introduction to this Manual This manual covers the hardware aspect of LINK-56K. A separate manual covers the operation of the software debugger System Features Microsoft Windows user interface Non-intrusive system Compatible with Motorola's tools High speed RS-232 interface with the emulation unit Interfaces with the DSP through the OnCE or JTAG emulation ports Multiple power supply modes Package Contents LINK-56K emulation unit Debug-56K software Power supply 10 pin cable 14 pin cable RS-232 cable User's manuals Registration form PROBE (Supplied with the DSP56001 emulator only) LINK-56K User Manual 5

6 General Information Hardware Requirements The minimum LINK-56K hardware requirements are the following: PC with Microsoft Windows 4 MB of hard disk space 8MBRAM 3.5" diskette drive RS-232 Port Mouse JTAG/OnCE 1 LINK-56K supports emulation through the JTAG port or the OnCE ports. The mode is selected automatically by the debugger software. One JTAG mode and two OnCE modes are available: JTAG mode: 10-pin OnCE mode: 14-pin OnCE mode: The JTAG mode is used with DSPs with a JTAG emulation port. The 14-pin cable should be used in the JTAG mode. The JTAG mode is used with DSPs with a JTAG emulation port. The 14-pin cable should be used in the JTAG mode. This mode is used with target cards using a 14-pin OnCE connector. The 14-pin cable should be used in this mode Powering Options LINK-56K supports multiple powering options. LINK-56K is normally powered by the adapter provided with the system. LINK-56K may optionally be powered by the target card and the target card may also supply LINK-56K. The following is a list of the powering modes available and the jumper settings. Mode 1: LINK-56K is powered by a DC adapter: JP3, JP4, JP6, JP7 in. JP1, JP2, JP5 out. JP8 out: LINK-56K not supplying target. JP8 in, JP9 +5: LINK-56K supplies target with +5V DC. JP8 in, JP9 +3: LINK-56K supplies target with +3V DC. LINK-56K User Manual 6

7 General Information Mode 2: Mode 3: LINK-56K is powered by an AC adapter: JP1, JP2, JP4, JP7 in. JP3, JP5, JP6 out. JP8 out: LINK-56K not supplying target. JP8 in, JP9 +5: LINK-56K supplies target with +5V DC. JP8 in, JP9 +3: LINK-56K supplies target with +3V DC. LINK-56K is powered by the target card: JP5 in JP1, JP2, JP3, JP4, JP6, JP7 out. The default mode is mode 1, with LINK-56K not supplying the target. The default mode for LINK is mode 1 with LINK-56K supplying target. 1 When LINK-56K is powering the target card, make sure not to overload the emulation unit. Up to 200 ma may be sourced form the emulation unit. Power sharing is done via the pin 8 of the the 10-pin cable or via pin-11 of the 14-pin cable. When LINK-56K is powered by the target card, 70 5VDC are needed. To change the powering mode remove the two screws at the back of the unit, remove the back panel, slide the card out of the box, and change jumpers. Connect the emulation unit to your target system through the supplied OnCE cable or the JTAG cable. If the connector on your target system is not protected for misplacement, make sure that the conductor with a strip connects to pin 1 of the connector The OnCE/JTAG Connector The OnCE and the JTAG signals share the same connector on the back of the emulator. modes are supported: Three 10-pin OnCE mode 14-pin OnCE mode JTAG mode The 10 pin cable should be used in the 10-pin OnCE mode. The 14-pin cable should be used in either the 14-pin OnCE mode or the JTAG mode. LINK-56K User Manual 7

8 General Information The following is the outline of the 10-pin cable connector in the 10-pin OnCE mode. Pin Description 1 DSI 2 Ground DSO 4 Ground 5 DSCLK 6 Ground 7 -DR 8 VCC 9 -RST (DSP reset) Ground 1 The following is the outline of the 14-pin cable connector in the 14-pin OnCE mode. Pin Description 1 DSI 2 GND DSO 4 GND 5 DSCLK 6 GND 7 -DR 8 Misplacement key 9 -RST Unused 11 VCC 12 Unused 13 Unused 14 Unused LINK-56K User Manual 8

9 General Information The following is the outline of the 14-pin cable connector in the JTAG mode. Pin Description 1 TDI 2 GND TDO 4 GND 5 TCK 6 GND 7 Unused 8 Misplacement key 9 -RST TMS0 11 VCC 12 TMS1 13 -DE 14 -TRST PROBE Jumper Settings This section of the manual applies to DSP56001 emulators only. For all other products please skip this section. Jumpers A, B, C in jumper block 1 are used to set the DSP's initial operating mode. Mode 0 is the default mode. The initial operating mode is often set by the target card, in such cases the jumpers A and B should be open. When a jumper is closed, the mode bit will be set to zero. The following table lists the valid modes with their respective jumper settings. Mode MMM/CBA DSP's Operating Mode PRAM enabled, Bootstrap from EPROM PRAM enabled, PRAM disabled, Reserved for bootstrap Bootstrap from HOST Bootstrap from SCI (ext clk) Reserved for bootstrap LINK-56K User Manual 9

10 General Information The clock to the DSP on the probe can be supplied either from the probe itself or from the target system. Jumpers J3, J4, J5 select the source of the clock. The following table lists the valid modes with their respective jumper settings. Jumper J3 Jumper J3 Jumper J3 DSP Clock Source Closed Closed Open From probe (local) Open Open Closed From target (external) Jumper J2 connects pin 8 of the OnCE connector to the power lines of the probe, this allows power sharing between the emulation unit and PROBE Jumper J2 Closed Open Powering mode Power shared through pin Independent powering Jumper J1 is used for the reset line. A blocking diode is used on PROBE in order to isolate the reset signal generated on the target from the reset line generated on the probe. If J1 is set, the diode is bypassed. If J1 is removed the diode is used. J1 should be removed for proper operation when the target system is generating a non-tristated reset signal. Jumper J2 Closed Open Reset mode Reset lines connected directly Reset lines connected through diode LINK-56K User Manual 10

11 References CHAPTER 2 - REFERENCES Figure 1-10 pin OnCE header 2 Example of target card circuitry when using a 10 pin OnCE header LINK-56K User Manual 11

12 References Figure 2-14 pin OnCE header 2 Example of target card circuitry when using a 14 pin OnCE header LINK-56K User Manual 12

13 References Figure 3-14 pin JTAG header 2 Example of target card circuitry when using 1 14 pin JTAG header. LINK-56K User Manual 13

14 References Figure 4 - LINK-56K circuit diagram. 2 LINK-56K User Manual 14

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