Output Range INEL 565 Analog Circuit Design 1/30/019 Last Lecture CS Amp. I D off ohmic sat sat ohmic ohmic I bias V B I bias V dd V dd -V ov A v Simplified Schematic Practical Implementation V ov1 V th V th +V ov1 Input Range V GS 4
INEL 565 Analog Circuit Design Last Lecture Circuit Design Transistor Sizing as a Function - Region of Operation - Drain Current - Minimum V ds (V ov in sat, 0. sub V t ) V B I bias A v, P ssupply The specifications of the circuit have a direct impact on the transistor sizing! (max) (min), (min), A v When designing a circuit, look for which transistors influences or determines each specification! G. Serrano - UPRM 5
INEL 565 Analog Circuit Design 1/30/019 Common Source Amplifier Design the following CS amplifier for the following specs: = [0.15.7] V P supply < 90μW A v > 30 V/V I ref P supply = I total V SS I ref = I D3 = I D = I D1 90μW P supply V SS 15μA I ref = 10μA V DS = V ov V ov min 0. 15V V ov = 0. 15V W L = 10μ 100μ 0. 15 = 8. 9 Assume: V T0n = V T0p = 1.0V, K n = 100µA/V, K p = 5µA/V, λ n = λ p = 0.V -1, = 3.0V 6
INEL 565 Analog Circuit Design 1/30/019 Common Source Amplifier Design the following CS amplifier for I ref the following specs: V SD1 = V ov1 A v = g m1 r 01 r 0 V ov1 min 0. 3V 30 = [0.15.7] V P supply < 90μW A v > 30 V/V W L 1 = A v = 10μ 5μ 8. 9 500k 500k 10μ 5μ 0. 3 V ov1 = 0. 3V = 8. 9 = 67μ 50k = 16. 8 V/V < 30V/V Does not complies! Modify! W L 36 1 A v = 134μ 50k = 33. 6 V/V > 30V/V Assume: V T0n = V T0p = 1.0V, K n = 100µA/V, K p = 5µA/V, λ n = λ p = 0.V -1, = 3.0V 7
Output Range INEL 565 Analog Circuit Design 1/30/019 Common Source Amplifier V b with Cascode Higher output impedance! V dd -V OV & off ohmic & sat. sat. & ohmic sat. V dd cascode transistor R o = r o 1 + g m r 01 V cn V d1 is fixed to... V d1 = V cn -V gs = V cn -V th -V ov V d1 +V ov cascode (min) = V ov1 +V ov @ V cn = V th + V ov + V ov1 V th Input Range V GS 8
INEL 565 Analog Circuit Design 1/30/019 Common Source Amplifier with Cascode Assuming V to =0.7V and V ov =0.V, for all transistor, find (min) for all circuits. V b V b V b V cn = 1.1V V cn = 1.4V V cn = 1.0V 9
INEL 565 Analog Circuit Design Output Range Common Drain Amplifier off ohmic sat sat V dd -V th -V ov1 V dd I bias V b A v 1 Simplified Schematic Practical Implementation V ov V th +V ov1 +V ov Input Range 10
INEL 565 Analog Circuit Design CD Amp. Class A Output Stage Maximum Source and Sink Capabilities @ =0 nmos pmos I source = K n1 V thn I bias Efficiency max = P R L P Vdd = 5% I sink = K p1 V ss V thp Ibias I sink = I bias I source = I bias R out I source V b R out I source I sink V M b R L R out A v 1 1 g m1 I sink R L R out 1 g m1 A v 1 V SS V SS 11
INEL 565 Analog Circuit Design CD Amp. Class B Output Stage Maximum Source and Sink Capabilities @ =0 Eff. max = P R L P Vdd = 78. 5% I source = K n1 V thn R out I sink = K p V ss V thp I source I sink R L A v 1 V SS R out 1 g m1 & are off Distortion! 1
INEL 565 Analog Circuit Design Problem 5.1-11 Assuming k n =k p and λ n =λ p, and the dc bias current through each inverter is equal. Qualitatively select, without using extensive calculations which inverters(s) has/have : a) The largest ac small-signal voltage gain b) The lower ac small-signal voltage gain c) The highest ac output resistance d) The lowest ac output resistance 13